With a recent increase in circuit size of a device including a processor and the like (hereinafter also referred to as chip), a huge cost of tests in a design stage and a shipping stage of the chip (i.e., chip test) is required.
There are many chip tests; for example, a built-in self-test, BIST is known. BIST is a method using a dedicated circuit (i.e., BIST circuit) which is incorporated in a chip and functions as an LSI tester for a chip test. Examples of the function as an LSI tester include a function of generating a test pattern, a function of supplying the test pattern to a chip as an input signal, a function of obtaining an output signal of a chip, and a function of comparing the output signal with an expected value. Using BIST can make the cost of a chip test lower than that in using only an LSI tester and increase the speed of chip test. Patent Document 1 discloses a technique in which a field-programmable gate array (FPGA) is used for a BIST circuit provided outside an LSI.